FPGA Engineer

£50,000.00 - £70,000.00 yearly
  • Arcade Communications Ltd
  • Coventry
  • Sep 04, 2023
Full time Computers and Internet Media and communication Telecoms 

Job Description

Arcade Communications Ltd provides technology solutions for delivering ultrafast broadband further, over existing carrier networks.

Currently we are offering an exciting opportunity with a competitive salary for the right person to join our talented team, based in Coventry.

You will be required to work in the office, however, on occasion there is an opportunity for hybrid working.

You must be eligible to work in the UK. Please note we are not considering candidates that require sponsorship.

Main Responsibilities

  • On-time delivery of FPGA solution based on requirements from the various engineering teams using Verilog RTL
  • Delivery of FPGA documentation to engineering and review teams
  • Use diagnostic tools and techniques to quickly resolve issues
  • Development of FPGA test benches for simulation and verification

As an FPGA engineer you will be expected to have experience of the following technologies:

 Xilinx FPGA

·         Zynq 7000 Series

·         Zynq Ultrascale+

·         Layer-2 packet switching

·         SoC implementation

·         DDR3/DDR4 implementation

·         1Gb/s, 2.5Gb/s, 10Gb/s SERDES implementation

Tools

·         Xilinx Vivado for both Synthesis and simulation

Verilog RTL coding

·         Module-level RTL design

·         Top-level integration

·         IP integration

·         Timing closure

Verilog verification

·         Pseudo-random based verification

 

Education

  • Educated to degree level or proven relevant industry experience
  • At least 4 years’ experience using FPGA design and simulation tools, particularly SoC-based design

Essential

  • At least 4 years’ experience using FPGA design and simulation tools, particularly SoC-based design

·         Verilog RTL design

·         Synthesis and simulation

·         Understand how to meet timing closure

·         Layer 2 transport mechanisms

Desirable

  • Experience working in telecommunications and/or network management domain
  • Experience in System Verilog

 

Experience Level

Mid Level